Canonical has released Ubuntu Core 24, the latest version of its Linux distro designed for edge and IoT applications. This version offers strict kernel-enforced…
Browsing: RISC-V
Andes Technology unveils its agenda for the annual ANDES RISC-V CON, featuring presentations and panels on the advancements and trends in RISC-V for automotive,…
The ANDES RISC-V CON is an industry event that brings together experts, researchers, and industry leaders to discuss the latest advancements in RISC-V technology.…
Siracusa is a near-sensor heterogeneous SoC for next-generation XR devices that combines an octa-core cluster of RISC-V DSP cores with a novel “At-Memory” integration…
Canonical has released Ubuntu Core 24, an ‘immutable’ version of Ubuntu designed for IoT devices. It features strict confinement, over-the-air updates, and support for…
Andes Technology and Rain AI are collaborating to accelerate Rain AI’s product roadmap by licensing Andes’ AX45MPV RISC-V vector processor. Rain AI’s novel accelerator…
X-Silicon Inc has developed a new open-standard low-power “C-GPU” architecture that combines GPU acceleration with a RISC-V Vector CPU Core, making it ideal for…
X-silicon has developed an IP core that combines a RISC-V processor with open standard Vulkan GPU for AI and machine learning chips. The NanoTile…
X-Silicon Inc (XSI) has developed a new open-standard low-power “C-GPU” architecture that combines GPU acceleration with a RISC-V Vector CPU Core for efficient processing…
RISC-V is a layered and extensible ISA with modular fixed-standard extensions, clean-slate design, and open-source nature, allowing for customization and collaboration. It is a…