Siracusa: A 16 Nm Heterogenous Risc-v Soc For Extended Reality With At-mram Neural Engine

Siracusa is a near-sensor heterogeneous SoC for next-generation XR devices that combines an octa-core cluster of RISC-V DSP cores with a novel “At-Memory” integration between a digital neural engine and on-chip MRAM, achieving higher throughput and energy efficiency for DNN inference.